Greetings to everyone!
The schema in brief:
Located at device 1 Located at device 2 Master SDA --------------- <physical connector> --------------- SDA Slave
According to I2C specifications: The Slave device must provide ACK signal holding SDA line on logical zero on success or do nothing on error, leaving I2C line high (NACK, logical one). This works fine when the resistance between Master is Slave is very low, for example, 5 milli-Ohm. But when the resistance rises to 100 or even 1000 milli-Ohm, the Slave can’t hold line at appropriate logical zero. Such resistance can appear when a physical connector exists between Master and Slave.
Schematically, the SDA-signal at line with 100-1000 milli-Ohm resistance behaves like this:
Master sends some control sequence (7 bits + 1 R/W bit) to the I2C bus and the Slave responses with 1 bit ACK (logical zero). Response with logical zero means that Slave holds line low, when Master holds line high.
Dev address W ACK 1 0 1 0 1 1 0 0 ? 5V ----- ----- ----- ----- | | | | | | ----- ~2.5V 0V | |_____| |_____| |_____ _____
Here the ACK signal is at level between 2-3 volts, so it is obviously not a logical zero.
How to “help” Slave keep SDA-line on zero (below 0.3V)? Are there are any common practices for solving this?
Thanks in advance.
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